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2048-pixel ccd linear image sensor (b/w) with shutter function description the ILX703A is a reduction type ccd linear sensor designed for facsimile, image scanner and ocr use. this sensor reads b4 size documents at a density of 200 dpi (dot per inch). featuring a shutter function, correspondences with the sensitivity correction, etc, is possible. a built-in timing generator and clock- drivers ensure direct drive at 5v logic for easy use. features number of effective pixels: 2048 pixels pixel size: 14m 14m (14m pitch) built-in timing generator and clock-drivers shutter function ultra low lag maximum clock frequency: 5mhz absolute maximum ratings supply voltage v dd1 11 v v dd2 6v operating temperature ?0 to +55 ? storage temperature ?0 to +80 ? pin configuration (top view) ?1 e93124d78-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ILX703A 22 pin dip (ceramic) 1 v out 2 gnd 3 gnd 4 shsw 5 f clk 6 v dd1 7 gnd 8 v dd2 9 shut 10 nc 11 f rog 12 gnd 22 21 20 19 18 17 16 15 14 13 v dd2 exrs v dd1 rssw v gg gnd gnd v dd1 nc nc 1 2048
?2 ILX703A block diagram aaaaaaaaaaaaa aaaaaaaaaaaaa aa aa a a v out gnd gnd shsw f clk v dd1 gnd v dd2 shut nc f rog gnd v dd2 exrs v dd1 rssw v gg gnd gnd v dd1 nc nc 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 shutter gate shutter drain read out gate ccd analog shift register clock-drivers clock pulse generator sample-and-hold pulse generator mode selector read out gate pulse generator shutter gate pulse generator output amplifier sample-and-hold circuit . d39 d38 d37 d36 d35 d34 s2048 s2047 s2 s1 d33 d15 d14
?3 ILX703A pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 symbol v out gnd gnd shsw f clk v dd1 gnd v dd2 shut nc f rog gnd nc nc v dd1 gnd gnd v gg rssw v dd1 exrs v dd2 description signal output gnd gnd with s/h ? gnd switch without s/h ? v dd2 clock pulse 9v power supply gnd 5v power supply shutter pulse nc clock pulse gnd nc nc 9v power supply gnd gnd output circuit gate bias reset pulse swithover pin (external rs ? v dd2 , internal rs ? gnd) 9v power supply rs input pin during external rs pulse usage 5v power supply {
?4 ILX703A item input capacity of f clk pin input capacity of f rog pin input capacity of shut pin input capacity of exrs pin min. typ. 10 10 10 10 max. unit pf pf pf pf symbol c f clk c f rog c shut c exrs input capacity of pins parameter input clock high level input clock low level min. 4.5 0.0 typ. 5.0 max. 5.5 0.5 unit v v recommended input pulse voltage item v dd1 v dd2 min. 8.5 4.75 typ. 9.0 5.0 max. 9.5 5.25 unit v v recommended voltage note) rules for raising and lowering power supply voltage to raise power supply voltage, first raise v dd1 (9v) and then v dd2 (5v). to lower voltage, first lower v dd2 (5v) and then v dd1 (9v). mode in use pin condition internal externel 21 pin exrs v dd2 v dd2 f rs 19 pin rssw gnd gnd v dd2 4 pin shsw s/h rs gnd v dd2 v dd2 yes no no mode description
?5 ILX703A item sensitivity 1 sensitivity 2 sensitivity 3 sensitivity 4 sensitivity nonuniformity saturation output voltage dark voltage average dark signal nonuniformity image lag dynamic range saturation exposure 9v supply current 5v supply current total transfer efficiency output impedance offset level shutter lag min. 22.5 1.5 92.0 0 typ. 30 95 20 500 2.0 1.8 0.3 0.5 0.02 6000 0.060 8.0 3.0 97.0 600 4.5 1.0 max. 37.5 8.0 2.0 3.0 14.0 6.0 5.0 unit v/(lx ?s) v/(lx ?s) v/(lx ?s) v/(lx ?s) % v mv mv % lx ?s ma ma % v % remarks note 1 note 2 note 3 note 4 note 5 note 6 note 6 note 7 note 8 note 9 note 10 note 11 symbol r1 r2 r3 r4 prnu v sat v drk dsnu il dr se i vdd1 i vdd2 tte z o v os shut electro-optical characteristics (ta = 25?, v dd1 = 9v, v dd2 = 5v, clock frequency: 1mhz, light source = 3200k, ir cut filter: cm-500s (t = 1.0mm)), when internal rs (pin 19 = gnd, pin 21 = v dd2 ) notes) 1) for the sensitivity test light is applied with a uniform intensity of illumination. 2) w lamp (2854k) 3) light source: led l = 570nm 4) light source: led l = 660nm 5) prnu is defined as indicated below. ray incidence conditions are the same as for note 1. prnu = 100 [%] the maximum output is set to v max , the minimum output to v min and the average output to v ave . 6) integration time is 10ms. 7) v out = 500mv 8) dr = v sat /v drk when optical accumulated time is shorter, the dynamic range gets wider because dark voitage is in proportion to optical accumulated time. 9) se = v sat /r1 (v max ?v min )/2 v ave
?6 ILX703A 10) v os is defined as indicated below. 11) to stipulate the lag during shutter operation, use the formula below. place the output voltage average value during shutter operation at v shut and the output voltage average value when the shutter is not in operation at v ave . (refer to figure 7.) please note that the shutter pulse at this time accord with figure 6. v shut shut = 100 [%] v ave os gnd d32 d33 s1 d31 v os
?7 ILX703A figure 1. clock timing diagram (for internal rs mode) f rog f clk v out * 5 0 5 0 1 2 3 4 2087 1 2 d2 d1 d3 d4 d5 d6 d11 d12 d13 d14 d15 d31 d32 d33 s1 s2 s3 s4 s2045 s2046 s2047 s2048 d34 d35 d36 d37 d38 d39 1-line output period (2087 pixels) dummy signal (33 pixels) effective picture elements signal (2048 pixels) dummy signal (6 pixels) optical black (18 pixels) * internal s/h is not in use (pin4 ? v dd2 )
?8 ILX703A figure 2. clock timing diagram (for external rs mode) f rog f clk v out 5 0 5 0 1 2 3 4 2087 1 2 d2 d3 d4 d5 d6 d11 d12 d13 d14 d15 d31 d32 d33 s1 s2 s3 s4 s2045 s2046 s2047 s2048 d34 d35 d36 d37 d38 d39 1-line output period (2087 pixels) dummy signal (33 pixels) effective picture elements signal (2048 pixels) dummy signal (6 pixels) optical black (18 pixels) 5 0 f rs
?9 ILX703A figure 3. f clk, v out timing (for internal rs mode) aaaaaa aaaaaa aaaaaa aaaa aaaa aaaa t1 t2 t3 t4 t17 t10 f clk v out item f clk pulse rise/fall time f clk pulse duty * 1 f clk ?v out 1 f clk ?v out 2 min. 0 40 50 30 typ. 10 50 80 75 max. 60 110 120 unit ns % ns ns symbol t1, t2 t10 t17 * 1 100 t3/(t3 + t4)
?10 ILX703A figure 4. f clk, f rs, v out timing (for external rs mode) aaaaaa aaaaaa aaaa aaaa t1 t2 t3 t4 t18 t10 f clk v out t8 t9 f rs t7 t6 t11 t5 item f clk, f rs pulse rise/fall time f clk pulse duty * 1 f clk ? f rs pulse timing f clk ? f rs pulse timing f rs pulse period f clk ?v out f rs ?v out min. 40 0 50 50 50 30 typ. 10 50 100 100 100 80 50 max. 50 60 110 70 unit ns % ns ns ns ns ns symbol t1, t2, t8, t9 t6 t7 t5 t10 t11, t18 * 1 100 t3/(t3 + t4)
?11 ILX703A figure 5. f rog, f clk timing t12 f clk t16 t15 t13 t14 f rog item f rog, f clk pulse timing f rog pulse rise/fall time f rog pulse period min. 500 0 500 typ. 1000 10 1000 max. unit ns ns ns symbol t12, t16 t13, t15 t14
?12 ILX703A figure 6. shutter operation mode clock f clk 2087 bits or more f rog 1ms illumination * f shut 5 0 5 0 5 0 light source on * during shutter lag evaluation, the light source will be accompanied by a flash.
?13 ILX703A figure 7. shutter pulse and output voltage f rog v out f shut 5v 0v 5v 0v on off on off on off shutter on v ave v shut illumination
?14 ILX703A * description of shutter pin 9 1) the state at 5v is when the shutter is not in operation. 2) when dropped to 0v, the shutter gate will open, letting the accumulated charge of the sensor be thrown away to the shutter drain. f rog f shut 5v 0v 5v 0v a aaaaaaaaaa aaaaaaaaaa aaa aaaaa accumulated charge of the sensor the charge up to this point will be thrown away to the shutter drain. shutter gate on the charge is sent to the transfer register as signal charge.
?15 ILX703A spectral sensitivity characteristics (standard characteristics) 400 500 600 700 800 900 1000 wavelength [nm] 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 relative sensitivity 0 0.2 0.4 0.6 0.8 1.0 0 x-mtf mtf of main scanning direction (standard characteristics) normalized spatial frequency 0.2 0.4 0.6 0.8 1.0 0 spatial frequency [cycles/mm] 7.1 14.3 21.4 28.6 35.7 0 0.2 0.4 0.6 0.8 1.0 0 y-mtf mtf of sub scanning direction (standard characteristics) normalized spatial frequency 0.2 0.4 0.6 0.8 1.0 0 spatial frequency [cycles/mm] 7.1 14.3 21.4 28.6 35.7 ta = 25? example of representative characteristics
?16 ILX703A 0 0.5 1 5 10 0.1 dark signal voltage rate dark signal voltage rate vs. ambient temperature (standard characteristics) ta ?ambient temperature [?] 10 20 30 40 50 0.1m 0.5 1 5 10 0.1 i vdd1 , i vdd2 ?v dd1 , v dd2 supply current [ma] v dd1 , v dd2 supply current vs. clock frequency (standard characteristics) clock frequency [hz] 1m 5m i vdd1 i vdd2
?17 ILX703A application circuit (when internal rs) 0.01 1 2 3 4 5 6 7 8 9 10 11 12 22 21 20 19 18 17 16 15 14 13 v out (d) gnd (a) gnd shsw f clk (a) v dd1 (d) gnd (d) v dd2 shut nc f rog nc gnd (d) v dd2 (d) exrs v dd1 (a) rssw v gg gnd (a) gnd (a) v dd1 (a) nc 22 pin dip 10/16v 1 w 5v 9v f clk f shut f rog 22/10v 0.01 output signal 3k w 10/16v 2sa1175 application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
?18 ILX703A notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) regulation for raising and lowering the power supply voltage when raising the supply voltage, first raise v dd1 (9v) and then v dd2 (5v). similarly, lower v dd2 (5v) first and then v dd1 (9v). 3) soldering a) make sure the package temperature does not exceed 80?. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a grounded 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, ground the controller. for the control system, use a zero cross type. 4) dust and dirt protection a) operate in clean environments. b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) exposure to high temperatures or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 6) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks.
?19 ILX703A package outline unit: mm package structure 22pin dip (400mil) v h 41.6 0.5 7.35 0.8 5.0 0.5 111 12 22 no.1 pixel 40.2 9.0 10.16 0?to 9 0.25 0.51 2.54 4.0 0.5 3.3 0.5 10.0 0.5 0.3 2.6 28.672 (14m 2048pixels) 1. the height from the bottom to the sensor surface is 1.61 0.3mm. 2. the thickness of the cover glass is 0.7mm, and the refractive index is 1.5 . (at stand off) m package material lead treatment lead material package weight cer-dip tin plating 42 alloy 3.9g

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